Half Adder and Half Subtractor using NAND NOR gates
Implementation of Half Adder using NAND gates :
Total 5 NAND gates are required to implement half adder.
Attention reader! Don’t stop learning now. Get hold of all the important CS Theory concepts for SDE interviews with the CS Theory Course at a student-friendly price and become industry ready.
Implementation of Half Adder using NOR gates :
Total 5 NOR gates are required to implement half adder.
Implementation of Half Subtractor using NAND gates :
Total 5 NAND gates are required to implement half subtractor.
Implementation of Half Subtractor using NOR gates :
Total 5 NOR gates are required to implement half subtractor.
This article is contributed by Sumouli Choudhury
