RISC-V Contributors

We thank our contributors. Without them the RISC-V project could not have been successful. We try hard to keep the list of contributors up-to-date, but if you or your contributions are not shown in the following list, please feel free to contact community@riscv.org.

RISC-V Infrastructure

  • Krste Asanovic, for defining the user-level, privileged and compressed ISAs, designing the Rocket core and the Hwacha vector unit, and starting the RISC-V project.
  • Rimas Avizienis, for implementing the Rocket core and the FPGA infrastructure, and defining the privileged ISA.
  • Christopher Batten, for providing comments on the user-level ISA.
  • Scott Beamer, for assisting with OS X support and improving the FPGA infrastructure.
  • Preston Briggs, for providing comments on the user-level ISA.
  • Christopher Celio, for implementing the Sodor processor collection and providing comments on the user-level and privileged ISA.
  • David Chisnall, for providing comments on the user-level and privileged ISA.
  • Henry Cook, for defining and implementing cache coherence protocols.
  • Palmer Dabbelt, for contributing to many parts of the infrastructure, porting Gentoo, and providing comments on the privileged ISA.
  • Stefan Freudenberger, for providing comments on the user-level ISA.
  • John Hauser, for contributing to the floating-point ISA, implementing floating-point units, and providing comments on the user-level ISA.
  • Sagar Karandikar, for porting QEMU, implementing ANGEL and the FPGA infrastructure, and designing the website.
  • Ben Keller, for providing comments on the user-level ISA.
  • Michael Knyszek, for porting libffi and OpenJDK with zero backend.
  • Yunsup Lee, for defining the user-level, privileged and compressed ISAs, authoring many parts of the infrastructure, implementing the Rocket core and Hwacha vector unit, and starting the RISC-V project.
  • Daiwei Li, for implementing the Hwacha vector unit.
  • Eric Love, for implementing the Sodor processor collection.
  • Martin Maas, for porting Yocto.
  • Quan Nguyen, for porting Linux, implementing the Hwacha vector unit, improving and documenting various parts of the infrastructure.
  • Rishiyur Nikhil, for providing comments on the user-level ISA.
  • Albert Ou, for porting Linux, implementing the Hwacha vector unit, improving various parts of the infrastructure, and providing comments on the privileged ISA.
  • David Patterson, for defining the user-level, privileged and compressed ISAs, and starting the RISC-V project.
  • Darius Rad, for implementing the soft-float ABI in GCC.
  • Brian Richards, for implementing parts of the floating-point unit.
  • Colin Schmidt, for porting LLVM and Clang.
  • Todd Snyder, for porting GDB.
  • Michael Taylor, for providing comments on the user-level ISA.
  • Matt Thomas, for providing comments on the privileged ISA.
  • Tommy Thorn, for implementing the YARVI core and providing comments on the user-level ISA.
  • Stephen Twigg, for improving the Rocket core.
  • Huy Vo, for implementing the Hwacha vector unit.
  • Andrew Waterman, for defining the user-level, privileged and compressed ISAs, authoring many parts of the infrastructure, implementing the Rocket core and Hwacha vector unit, and starting the RISC-V project.
  • Robert Watson, for providing comments on the user-level ISA.